init:初始框架
This commit is contained in:
SkyLi
@@ -0,0 +1,111 @@
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/**
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* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
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* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
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* @cliArgs --device "MSPM0G350X" --part "Default" --package "LQFP-64(PM)" --product "mspm0_sdk@2.04.00.06"
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* @v2CliArgs --device "MSPM0G3507" --package "LQFP-64(PM)" --product "mspm0_sdk@2.04.00.06"
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* @versions {"tool":"1.23.1+4034"}
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*/
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/**
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* Import the modules used in this configuration.
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*/
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const GPIO = scripting.addModule("/ti/driverlib/GPIO", {}, false);
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const GPIO1 = GPIO.addInstance();
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const GPIO2 = GPIO.addInstance();
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const SYSCTL = scripting.addModule("/ti/driverlib/SYSCTL");
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const SYSTICK = scripting.addModule("/ti/driverlib/SYSTICK");
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const VREF = scripting.addModule("/ti/driverlib/VREF");
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/**
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* Write custom configuration values to the imported modules.
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*/
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const divider2 = system.clockTree["HFCLK4MFPCLKDIV"];
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divider2.divideValue = 10;
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const divider9 = system.clockTree["UDIV"];
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divider9.divideValue = 2;
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const gate7 = system.clockTree["MFCLKGATE"];
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gate7.enable = true;
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const gate8 = system.clockTree["MFPCLKGATE"];
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gate8.enable = true;
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const multiplier2 = system.clockTree["PLL_QDIV"];
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multiplier2.multiplyValue = 4;
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const mux4 = system.clockTree["EXHFMUX"];
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mux4.inputSelect = "EXHFMUX_XTAL";
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const mux5 = system.clockTree["EXLFMUX"];
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mux5.inputSelect = "EXLFMUX_XTAL";
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const mux8 = system.clockTree["HSCLKMUX"];
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mux8.inputSelect = "HSCLKMUX_SYSPLL0";
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const mux9 = system.clockTree["LFXTMUX"];
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mux9.inputSelect = "LFXTMUX_TRUE";
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const mux12 = system.clockTree["SYSPLLMUX"];
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mux12.inputSelect = "zSYSPLLMUX_HFCLK";
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const pinFunction4 = system.clockTree["HFXT"];
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pinFunction4.inputFreq = 40;
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pinFunction4.enable = true;
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const pinFunction6 = system.clockTree["LFXT"];
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pinFunction6.inputFreq = 32.768;
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pinFunction6.enable = true;
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pinFunction6.peripheral.$assign = "SYSCTL";
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pinFunction6.peripheral.lfxInPin.$assign = "PA3";
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pinFunction6.peripheral.lfxOutPin.$assign = "PA4";
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GPIO1.port = "PORTA";
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GPIO1.$name = "LED_A14";
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GPIO1.associatedPins[0].internalResistor = "PULL_DOWN";
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GPIO1.associatedPins[0].$name = "PIN_14";
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GPIO1.associatedPins[0].assignedPin = "14";
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GPIO1.associatedPins[0].pin.$assign = "PA14";
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const Board = scripting.addModule("/ti/driverlib/Board", {}, false);
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GPIO2.port = "PORTA";
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GPIO2.$name = "KEY_BSL";
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GPIO2.associatedPins[0].$name = "PIN_18";
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GPIO2.associatedPins[0].direction = "INPUT";
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GPIO2.associatedPins[0].assignedPin = "18";
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GPIO2.associatedPins[0].internalResistor = "PULL_DOWN";
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GPIO2.associatedPins[0].interruptEn = true;
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GPIO2.associatedPins[0].polarity = "RISE";
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GPIO2.associatedPins[0].pin.$assign = "PA18";
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SYSCTL.forceDefaultClkConfig = true;
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SYSCTL.clockTreeEn = true;
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scripting.suppress("For best practices when the CPUCLK is running at 32MHz and above, clear the flash status bit using DL_FlashCTL_executeClearStatus\\(\\) before executing any flash operation\\. Otherwise there may be false positives\\.", SYSCTL);
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SYSTICK.periodEnable = true;
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SYSTICK.interruptPriority = "0";
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SYSTICK.systickEnable = true;
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SYSTICK.period = 80;
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VREF.basicVrefPins = "VREF+-";
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VREF.basicIntVolt = "DL_VREF_BUFCONFIG_OUTPUT_2_5V";
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VREF.basicMode = "DL_VREF_ENABLE_DISABLE";
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VREF.basicExtVolt = 3.3;
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VREF.vrefPosPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric29";
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VREF.peripheral.$assign = "VREF";
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VREF.peripheral.vrefPosPin.$assign = "PA23";
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VREF.peripheral.vrefNegPin.$assign = "PA21";
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VREF.vrefNegPinConfig.$name = "ti_driverlib_gpio_GPIOPinGeneric30";
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/**
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* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
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* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
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* re-solve from scratch.
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*/
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pinFunction4.peripheral.$suggestSolution = "SYSCTL";
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pinFunction4.peripheral.hfxInPin.$suggestSolution = "PA5";
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pinFunction4.peripheral.hfxOutPin.$suggestSolution = "PA6";
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Board.peripheral.$suggestSolution = "DEBUGSS";
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Board.peripheral.swclkPin.$suggestSolution = "PA20";
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Board.peripheral.swdioPin.$suggestSolution = "PA19";
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@@ -0,0 +1,252 @@
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;//*****************************************************************************
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;//
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;// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com/
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;//
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;// Redistribution and use in source and binary forms, with or without
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;// modification, are permitted provided that the following conditions
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;// are met:
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;//
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;// Redistributions of source code must retain the above copyright
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;// notice, this list of conditions and the following disclaimer.
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;//
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;// Redistributions in binary form must reproduce the above copyright
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;// notice, this list of conditions and the following disclaimer in the
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;// documentation and/or other materials provided with the
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;// distribution.
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;//
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;// Neither the name of Texas Instruments Incorporated nor the names of
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;// its contributors may be used to endorse or promote products derived
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;// from this software without specific prior written permission.
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;//
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;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
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;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;//
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;// MSPM0G3507 startup file
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;//
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;//****************************************************************************
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;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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;*/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00001000
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000400
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD GROUP0_IRQHandler ; 1: GROUP0 interrupt handler
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DCD GROUP1_IRQHandler ; 2: GROUP1 interrupt handler
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DCD TIMG8_IRQHandler ; 3: TIMG8 interrupt handler
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DCD UART3_IRQHandler ; 4: UART3 interrupt handler
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DCD ADC0_IRQHandler ; 5: ADC0 interrupt handler
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DCD ADC1_IRQHandler ; 6: ADC1 interrupt handler
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DCD CANFD0_IRQHandler ; 7: CANFD0 interrupt handler
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DCD DAC0_IRQHandler ; 8: DAC0 interrupt handler
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DCD 0 ; 9: Reserved
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DCD SPI0_IRQHandler ; 10: SPI0 interrupt handler
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DCD SPI1_IRQHandler ; 11: SPI1 interrupt handler
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DCD 0 ; 12: Reserved
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DCD 0 ; 13: Reserved
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DCD UART1_IRQHandler ; 14: UART1 interrupt handler
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DCD UART2_IRQHandler ; 15: UART2 interrupt handler
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DCD UART0_IRQHandler ; 16: UART0 interrupt handler
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DCD TIMG0_IRQHandler ; 17: TIMG0 interrupt handler
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DCD TIMG6_IRQHandler ; 18: TIMG6 interrupt handler
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DCD TIMA0_IRQHandler ; 19: TIMA0 interrupt handler
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DCD TIMA1_IRQHandler ; 20: TIMA1 interrupt handler
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DCD TIMG7_IRQHandler ; 21: TIMG7 interrupt handler
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DCD TIMG12_IRQHandler ; 22: TIMG12 interrupt handler
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DCD 0 ; 23: Reserved
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DCD 0 ; 24: Reserved
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DCD I2C0_IRQHandler ; 25: I2C0 interrupt handler
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DCD I2C1_IRQHandler ; 26: I2C1 interrupt handler
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DCD 0 ; 27: Reserved
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DCD 0 ; 28: Reserved
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DCD AES_IRQHandler ; 29: AES interrupt handler
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DCD 0 ; 30: Reserved
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DCD RTC_IRQHandler ; 31: RTC interrupt handler
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DCD DMA_IRQHandler ; 32: DMA interrupt handler
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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;IMPORT SystemInit
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IMPORT __main
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; SystemInit can be called here, but not necessary for MSPM0
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;LDR R0, =SystemInit
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;BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT Default_Handler [WEAK]
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EXPORT GROUP0_IRQHandler [WEAK]
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EXPORT GROUP1_IRQHandler [WEAK]
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EXPORT TIMG8_IRQHandler [WEAK]
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EXPORT UART3_IRQHandler [WEAK]
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EXPORT ADC0_IRQHandler [WEAK]
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EXPORT ADC1_IRQHandler [WEAK]
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EXPORT CANFD0_IRQHandler [WEAK]
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EXPORT DAC0_IRQHandler [WEAK]
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EXPORT SPI0_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT UART1_IRQHandler [WEAK]
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EXPORT UART2_IRQHandler [WEAK]
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EXPORT UART0_IRQHandler [WEAK]
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EXPORT TIMG0_IRQHandler [WEAK]
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EXPORT TIMG6_IRQHandler [WEAK]
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EXPORT TIMA0_IRQHandler [WEAK]
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EXPORT TIMA1_IRQHandler [WEAK]
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EXPORT TIMG7_IRQHandler [WEAK]
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EXPORT TIMG12_IRQHandler [WEAK]
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EXPORT I2C0_IRQHandler [WEAK]
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EXPORT I2C1_IRQHandler [WEAK]
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EXPORT AES_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT DMA_IRQHandler [WEAK]
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GROUP0_IRQHandler
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GROUP1_IRQHandler
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TIMG8_IRQHandler
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UART3_IRQHandler
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ADC0_IRQHandler
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ADC1_IRQHandler
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CANFD0_IRQHandler
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DAC0_IRQHandler
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SPI0_IRQHandler
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SPI1_IRQHandler
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UART1_IRQHandler
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UART2_IRQHandler
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UART0_IRQHandler
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TIMG0_IRQHandler
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TIMG6_IRQHandler
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TIMA0_IRQHandler
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TIMA1_IRQHandler
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TIMG7_IRQHandler
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TIMG12_IRQHandler
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I2C0_IRQHandler
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I2C1_IRQHandler
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AES_IRQHandler
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RTC_IRQHandler
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DMA_IRQHandler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap PROC
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ENDP
|
||||
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ALIGN
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||||
|
||||
ENDIF
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||||
|
||||
|
||||
END
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||||
@@ -0,0 +1,283 @@
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/*
|
||||
* Copyright (c) 2023, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ============ ti_msp_dl_config.c =============
|
||||
* Configured MSPM0 DriverLib module definitions
|
||||
*
|
||||
* DO NOT EDIT - This file is generated for the MSPM0G350X
|
||||
* by the SysConfig tool.
|
||||
*/
|
||||
|
||||
#include "ti_msp_dl_config.h"
|
||||
|
||||
/*
|
||||
* ======== SYSCFG_DL_init ========
|
||||
* Perform any initialization needed before using any board APIs
|
||||
*/
|
||||
SYSCONFIG_WEAK void SYSCFG_DL_init(void)
|
||||
{
|
||||
SYSCFG_DL_initPower();
|
||||
SYSCFG_DL_GPIO_init();
|
||||
/* Module-Specific Initializations*/
|
||||
SYSCFG_DL_SYSCTL_init();
|
||||
SYSCFG_DL_VREF_init();
|
||||
SYSCFG_DL_SYSTICK_init();
|
||||
}
|
||||
|
||||
SYSCONFIG_WEAK void SYSCFG_DL_initPower(void)
|
||||
{
|
||||
DL_GPIO_reset(GPIOA);
|
||||
DL_GPIO_reset(GPIOB);
|
||||
DL_VREF_reset(VREF);
|
||||
|
||||
|
||||
DL_GPIO_enablePower(GPIOA);
|
||||
DL_GPIO_enablePower(GPIOB);
|
||||
DL_VREF_enablePower(VREF);
|
||||
|
||||
delay_cycles(POWER_STARTUP_DELAY);
|
||||
}
|
||||
|
||||
SYSCONFIG_WEAK void SYSCFG_DL_GPIO_init(void)
|
||||
{
|
||||
|
||||
DL_GPIO_initPeripheralAnalogFunction(GPIO_HFXIN_IOMUX);
|
||||
DL_GPIO_initPeripheralAnalogFunction(GPIO_HFXOUT_IOMUX);
|
||||
DL_GPIO_initPeripheralAnalogFunction(GPIO_LFXIN_IOMUX);
|
||||
DL_GPIO_initPeripheralAnalogFunction(GPIO_LFXOUT_IOMUX);
|
||||
|
||||
DL_GPIO_initDigitalOutputFeatures(LED_A14_PIN_14_IOMUX,
|
||||
DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_DOWN,
|
||||
DL_GPIO_DRIVE_STRENGTH_LOW, DL_GPIO_HIZ_DISABLE);
|
||||
|
||||
DL_GPIO_initDigitalInputFeatures(KEY_BSL_PIN_18_IOMUX,
|
||||
DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_DOWN,
|
||||
DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE);
|
||||
|
||||
DL_GPIO_clearPins(GPIOA, LED_A14_PIN_14_PIN);
|
||||
DL_GPIO_enableOutput(GPIOA, LED_A14_PIN_14_PIN);
|
||||
DL_GPIO_setUpperPinsPolarity(GPIOA, DL_GPIO_PIN_18_EDGE_RISE);
|
||||
DL_GPIO_clearInterruptStatus(GPIOA, KEY_BSL_PIN_18_PIN);
|
||||
DL_GPIO_enableInterrupt(GPIOA, KEY_BSL_PIN_18_PIN);
|
||||
|
||||
}
|
||||
|
||||
|
||||
static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
|
||||
.inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_32_48_MHZ,
|
||||
.rDivClk2x = 1,
|
||||
.rDivClk1 = 0,
|
||||
.rDivClk0 = 0,
|
||||
.enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
|
||||
.enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_DISABLE,
|
||||
.enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_ENABLE,
|
||||
.sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
|
||||
.sysPLLRef = DL_SYSCTL_SYSPLL_REF_HFCLK,
|
||||
.qDiv = 3,
|
||||
.pDiv = DL_SYSCTL_SYSPLL_PDIV_1
|
||||
};
|
||||
static const DL_SYSCTL_LFCLKConfig gLFCLKConfig = {
|
||||
.lowCap = false,
|
||||
.monitor = false,
|
||||
.xt1Drive = DL_SYSCTL_LFXT_DRIVE_STRENGTH_HIGHEST,
|
||||
};
|
||||
|
||||
|
||||
///////////////////////////////////////////////////////////////
|
||||
|
||||
|
||||
void DL_SYSCTL_setHFCLKSourceHFXTParams (DL_SYSCTL_HFXT_RANGE range, uint32_t startupTime, bool monitorEnable)
|
||||
{
|
||||
uint32_t register_temp = SYSCTL->SOCLOCK.HFCLKCLKCFG;
|
||||
|
||||
register_temp &= ~(SYSCTL_HFCLKCLKCFG_HFXTRSEL_MASK | SYSCTL_HFCLKCLKCFG_HFCLKFLTCHK_MASK);
|
||||
|
||||
switch(range)
|
||||
{
|
||||
case DL_SYSCTL_HFXT_RANGE_4_8_MHZ : register_temp |= (SYSCTL_HFCLKCLKCFG_HFXTRSEL_RANGE4TO8); break;
|
||||
case DL_SYSCTL_HFXT_RANGE_8_16_MHZ : register_temp |= (SYSCTL_HFCLKCLKCFG_HFXTRSEL_RANGE8TO16); break;
|
||||
case DL_SYSCTL_HFXT_RANGE_16_32_MHZ: register_temp |= (SYSCTL_HFCLKCLKCFG_HFXTRSEL_RANGE16TO32); break;
|
||||
case DL_SYSCTL_HFXT_RANGE_32_48_MHZ: register_temp |= (SYSCTL_HFCLKCLKCFG_HFXTRSEL_RANGE32TO48); break;
|
||||
}
|
||||
register_temp |= (monitorEnable) ? (SYSCTL_HFCLKCLKCFG_HFCLKFLTCHK_ENABLE) : (SYSCTL_HFCLKCLKCFG_HFCLKFLTCHK_DISABLE);
|
||||
|
||||
SYSCTL->SOCLOCK.HFCLKCLKCFG = register_temp;
|
||||
|
||||
SYSCTL->SOCLOCK.HSCLKEN |= SYSCTL_HSCLKEN_HFXTEN_ENABLE; // 必须启动 否则频率不准
|
||||
|
||||
SYSCTL->SOCLOCK.HSCLKEN = SYSCTL_HSCLKEN_SYSPLLEN_ENABLE | SYSCTL_HSCLKEN_USEEXTHFCLK_ENABLE;
|
||||
SYSCTL->SOCLOCK.HSCLKEN |= SYSCTL_HSCLKCFG_HSCLKSEL_HFCLKCLK;
|
||||
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void DL_SYSCTL_configSYSPLL (const DL_SYSCTL_SYSPLLConfig *config)
|
||||
{
|
||||
uint32_t register_temp = 0;
|
||||
|
||||
|
||||
SYSCTL->SOCLOCK.HSCLKEN &= ~(SYSCTL_HSCLKEN_SYSPLLEN_MASK);
|
||||
|
||||
{
|
||||
register_temp = SYSCTL->SOCLOCK.SYSPLLCFG0;
|
||||
|
||||
register_temp &= ~(SYSCTL_SYSPLLCFG0_SYSPLLREF_MASK | SYSCTL_SYSPLLCFG0_MCLK2XVCO_MASK
|
||||
| SYSCTL_SYSPLLCFG0_ENABLECLK0_MASK | SYSCTL_SYSPLLCFG0_ENABLECLK1_MASK | SYSCTL_SYSPLLCFG0_ENABLECLK2X_MASK
|
||||
| SYSCTL_SYSPLLCFG0_RDIVCLK0_MASK | SYSCTL_SYSPLLCFG0_RDIVCLK1_MASK | SYSCTL_SYSPLLCFG0_RDIVCLK2X_MASK );
|
||||
register_temp |= config->rDivClk2x ;
|
||||
register_temp |= config->rDivClk1 ;
|
||||
register_temp |= config->rDivClk0 ;
|
||||
register_temp |= config->enableCLK2x ;
|
||||
register_temp |= config->enableCLK1 ;
|
||||
register_temp |= config->enableCLK0 ;
|
||||
register_temp |= config->sysPLLMCLK ;
|
||||
register_temp |= config->sysPLLRef ;
|
||||
|
||||
SYSCTL->SOCLOCK.SYSPLLCFG0 = register_temp;
|
||||
}
|
||||
|
||||
|
||||
{
|
||||
register_temp = SYSCTL->SOCLOCK.SYSPLLCFG1;
|
||||
|
||||
register_temp &= ~(SYSCTL_SYSPLLCFG1_PDIV_MASK | SYSCTL_SYSPLLCFG1_QDIV_MASK);
|
||||
register_temp |= (config->qDiv << SYSCTL_SYSPLLCFG1_QDIV_OFS );
|
||||
register_temp |= (config->pDiv);
|
||||
|
||||
SYSCTL->SOCLOCK.SYSPLLCFG1 = register_temp;
|
||||
}
|
||||
|
||||
{
|
||||
SYSCTL->SOCLOCK.SYSPLLPARAM0 =
|
||||
*(volatile uint32_t *) ((uint32_t) config->inputFreq);
|
||||
SYSCTL->SOCLOCK.SYSPLLPARAM1 =
|
||||
*(volatile uint32_t *) ((uint32_t) config->inputFreq + (uint32_t) 0x4);
|
||||
}
|
||||
|
||||
|
||||
SYSCTL->SOCLOCK.HSCLKEN |= SYSCTL_HSCLKEN_SYSPLLEN_ENABLE;
|
||||
|
||||
while ((DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_SYSPLLGOOD_MASK) !=
|
||||
DL_SYSCTL_CLK_STATUS_SYSPLL_GOOD) {
|
||||
;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
void DL_SYSCTL_setLFCLKSourceLFXT (const DL_SYSCTL_LFCLKConfig *config)
|
||||
{
|
||||
uint32_t register_temp = SYSCTL->SOCLOCK.LFCLKCFG;
|
||||
|
||||
register_temp &= ~(SYSCTL_LFCLKCFG_XT1DRIVE_MASK | SYSCTL_LFCLKCFG_MONITOR_MASK | SYSCTL_LFCLKCFG_LOWCAP_MASK);
|
||||
register_temp |= (config->lowCap) ? (SYSCTL_LFCLKCFG_LOWCAP_ENABLE) : (SYSCTL_LFCLKCFG_LOWCAP_DISABLE);
|
||||
register_temp |= (config->monitor) ? (SYSCTL_LFCLKCFG_MONITOR_ENABLE) : (SYSCTL_LFCLKCFG_MONITOR_DISABLE);
|
||||
register_temp |= (config->xt1Drive);
|
||||
|
||||
SYSCTL->SOCLOCK.LFCLKCFG = register_temp;
|
||||
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void DL_SYSCTL_switchMCLKfromSYSOSCtoHSCLK (DL_SYSCTL_HSCLK_SOURCE source)
|
||||
{
|
||||
|
||||
SYSCTL->SOCLOCK.HSCLKCFG = (uint32_t) source;
|
||||
SYSCTL->SOCLOCK.MCLKCFG |= SYSCTL_MCLKCFG_USEHSCLK_ENABLE;
|
||||
|
||||
}
|
||||
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
SYSCONFIG_WEAK void SYSCFG_DL_SYSCTL_init(void)
|
||||
{
|
||||
|
||||
//Low Power Mode is configured to be SLEEP0
|
||||
DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
|
||||
DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);
|
||||
|
||||
|
||||
DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
|
||||
/* Set default configuration */
|
||||
DL_SYSCTL_disableHFXT();
|
||||
DL_SYSCTL_disableSYSPLL();
|
||||
DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_32_48_MHZ,0, false);
|
||||
DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
|
||||
DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_2);
|
||||
DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_10);
|
||||
DL_SYSCTL_setLFCLKSourceLFXT((DL_SYSCTL_LFCLKConfig *) &gLFCLKConfig);
|
||||
DL_SYSCTL_enableMFCLK();
|
||||
DL_SYSCTL_enableMFPCLK();
|
||||
DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_SYSOSC);
|
||||
DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
static const DL_VREF_Config gVREFConfig = {
|
||||
.vrefEnable = DL_VREF_ENABLE_DISABLE,
|
||||
.bufConfig = DL_VREF_BUFCONFIG_OUTPUT_2_5V,
|
||||
.shModeEnable = DL_VREF_SHMODE_DISABLE,
|
||||
.holdCycleCount = DL_VREF_HOLD_MIN,
|
||||
.shCycleCount = DL_VREF_SH_MIN,
|
||||
};
|
||||
|
||||
SYSCONFIG_WEAK void SYSCFG_DL_VREF_init(void) {
|
||||
DL_VREF_configReference(VREF,
|
||||
(DL_VREF_Config *) &gVREFConfig);
|
||||
}
|
||||
|
||||
|
||||
SYSCONFIG_WEAK void SYSCFG_DL_SYSTICK_init(void)
|
||||
{
|
||||
/* Initialize the period to 1.00 μs */
|
||||
DL_SYSTICK_init(80);
|
||||
/* Enable the SysTick and start counting */
|
||||
DL_SYSTICK_enable();
|
||||
}
|
||||
|
||||
@@ -0,0 +1,138 @@
|
||||
/*
|
||||
* Copyright (c) 2023, Texas Instruments Incorporated - http://www.ti.com
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
*
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* * Neither the name of Texas Instruments Incorporated nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ============ ti_msp_dl_config.h =============
|
||||
* Configured MSPM0 DriverLib module declarations
|
||||
*
|
||||
* DO NOT EDIT - This file is generated for the MSPM0G350X
|
||||
* by the SysConfig tool.
|
||||
*/
|
||||
#ifndef ti_msp_dl_config_h
|
||||
#define ti_msp_dl_config_h
|
||||
|
||||
#define CONFIG_MSPM0G350X
|
||||
#define CONFIG_MSPM0G3507
|
||||
|
||||
#if defined(__ti_version__) || defined(__TI_COMPILER_VERSION__)
|
||||
#define SYSCONFIG_WEAK __attribute__((weak))
|
||||
#elif defined(__IAR_SYSTEMS_ICC__)
|
||||
#define SYSCONFIG_WEAK __weak
|
||||
#elif defined(__GNUC__)
|
||||
#define SYSCONFIG_WEAK __attribute__((weak))
|
||||
#endif
|
||||
|
||||
#include <ti/devices/msp/msp.h>
|
||||
#include <ti/driverlib/driverlib.h>
|
||||
#include <ti/driverlib/m0p/dl_core.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* ======== SYSCFG_DL_init ========
|
||||
* Perform all required MSP DL initialization
|
||||
*
|
||||
* This function should be called once at a point before any use of
|
||||
* MSP DL.
|
||||
*/
|
||||
|
||||
|
||||
/* clang-format off */
|
||||
|
||||
#define POWER_STARTUP_DELAY (16)
|
||||
|
||||
|
||||
#define GPIO_HFXT_PORT GPIOA
|
||||
#define GPIO_HFXIN_PIN DL_GPIO_PIN_5
|
||||
#define GPIO_HFXIN_IOMUX (IOMUX_PINCM10)
|
||||
#define GPIO_HFXOUT_PIN DL_GPIO_PIN_6
|
||||
#define GPIO_HFXOUT_IOMUX (IOMUX_PINCM11)
|
||||
#define GPIO_LFXT_PORT GPIOA
|
||||
#define GPIO_LFXIN_PIN DL_GPIO_PIN_3
|
||||
#define GPIO_LFXIN_IOMUX (IOMUX_PINCM8)
|
||||
#define GPIO_LFXOUT_PIN DL_GPIO_PIN_4
|
||||
#define GPIO_LFXOUT_IOMUX (IOMUX_PINCM9)
|
||||
#define CPUCLK_FREQ 80000000
|
||||
|
||||
|
||||
|
||||
/* Defines for VREF */
|
||||
#define VREF_VOLTAGE_MV 3300
|
||||
#define GPIO_VREF_VREFPOS_PORT GPIOA
|
||||
#define GPIO_VREF_VREFPOS_PIN DL_GPIO_PIN_23
|
||||
#define GPIO_VREF_IOMUX_VREFPOS (IOMUX_PINCM53)
|
||||
#define GPIO_VREF_IOMUX_VREFPOS_FUNC IOMUX_PINCM53_PF_UNCONNECTED
|
||||
#define GPIO_VREF_VREFNEG_PORT GPIOA
|
||||
#define GPIO_VREF_VREFNEG_PIN DL_GPIO_PIN_21
|
||||
#define GPIO_VREF_IOMUX_VREFNEG (IOMUX_PINCM46)
|
||||
#define GPIO_VREF_IOMUX_VREFNEG_FUNC IOMUX_PINCM46_PF_UNCONNECTED
|
||||
|
||||
|
||||
|
||||
|
||||
/* Port definition for Pin Group LED_A14 */
|
||||
#define LED_A14_PORT (GPIOA)
|
||||
|
||||
/* Defines for PIN_14: GPIOA.14 with pinCMx 36 on package pin 7 */
|
||||
#define LED_A14_PIN_14_PIN (DL_GPIO_PIN_14)
|
||||
#define LED_A14_PIN_14_IOMUX (IOMUX_PINCM36)
|
||||
/* Port definition for Pin Group KEY_BSL */
|
||||
#define KEY_BSL_PORT (GPIOA)
|
||||
|
||||
/* Defines for PIN_18: GPIOA.18 with pinCMx 40 on package pin 11 */
|
||||
// pins affected by this interrupt request:["PIN_18"]
|
||||
#define KEY_BSL_INT_IRQN (GPIOA_INT_IRQn)
|
||||
#define KEY_BSL_INT_IIDX (DL_INTERRUPT_GROUP1_IIDX_GPIOA)
|
||||
#define KEY_BSL_PIN_18_IIDX (DL_GPIO_IIDX_DIO18)
|
||||
#define KEY_BSL_PIN_18_PIN (DL_GPIO_PIN_18)
|
||||
#define KEY_BSL_PIN_18_IOMUX (IOMUX_PINCM40)
|
||||
|
||||
|
||||
|
||||
/* clang-format on */
|
||||
|
||||
void SYSCFG_DL_init(void);
|
||||
void SYSCFG_DL_initPower(void);
|
||||
void SYSCFG_DL_GPIO_init(void);
|
||||
void SYSCFG_DL_SYSCTL_init(void);
|
||||
void SYSCFG_DL_VREF_init(void);
|
||||
|
||||
void SYSCFG_DL_SYSTICK_init(void);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ti_msp_dl_config_h */
|
||||
Reference in New Issue
Block a user