/***************************************************************************** Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com/ Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. Neither the name of Texas Instruments Incorporated nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *****************************************************************************/ #ifndef ti_devices_msp_peripherals_hw_wuc__include #define ti_devices_msp_peripherals_hw_wuc__include /* This preliminary header file does not have a version number */ /* MMR repo: https://bitbucket.itg.ti.com/projects/cmcu_msp65ip/repos/f65mspwuc */ /* MMR revision: 3f3c7febcc901c572b112d1a4f92d5ccd9701ce1 */ /* Generator revision: 77992b62fb4e9926f5a9143aae1e89fec6a84738 (MInT: ec7ec7482a60c6871be32db8b378ec27aa4771f6) */ #ifndef __CORTEX_M #ifdef __cplusplus #define __I volatile /*!< Defines 'read only' permissions */ #else #define __I volatile const /*!< Defines 'read only' permissions */ #endif #define __O volatile /*!< Defines 'write only' permissions */ #define __IO volatile /*!< Defines 'read / write' permissions */ /* following defines should be used for structure members */ #define __IM volatile const /*! Defines 'read only' structure member permissions */ #define __OM volatile /*! Defines 'write only' structure member permissions */ #define __IOM volatile /*! Defines 'read / write' structure member permissions */ #endif /* Use standard integer types with explicit width */ #include #ifdef __cplusplus extern "C" { #endif #if defined ( __CC_ARM ) #pragma anon_unions #endif /****************************************************************************** * WUC Registers ******************************************************************************/ /** @addtogroup WUC @{ */ typedef struct { uint32_t RESERVED0[256]; __IO uint32_t FSUB_0; /* !< (@ 0x00000400) Subscriber Port 0 */ __IO uint32_t FSUB_1; /* !< (@ 0x00000404) Subscriber Port 1 */ } WUC_Regs; /*@}*/ /* end of group WUC */ #if defined ( __CC_ARM ) #pragma no_anon_unions #endif /****************************************************************************** * WUC Register Control Bits ******************************************************************************/ /* WUC_FSUB_0 Bits */ /* WUC_FSUB_0[CHANID] Bits */ #define WUC_FSUB_0_CHANID_OFS (0) /* !< CHANID Offset */ #define WUC_FSUB_0_CHANID_MASK ((uint32_t)0x000000FFU) /* !< 0 = disconnected. 1-15 = connected to channelID = CHANID. */ #define WUC_FSUB_0_CHANID_MNIMUM ((uint32_t)0x00000000U) /* !< 0 is an allowed value, signifying that the event is unconnected */ #define WUC_FSUB_0_CHANID_UNCONNECTED ((uint32_t)0x00000000U) /* !< A value of 0 specifies that the event is not connected */ #define WUC_FSUB_0_CHANID_MAXIMUM ((uint32_t)0x0000000FU) /* !< Consult your device datasheet as the actual allowed maximum may be less than 15. */ /* WUC_FSUB_1 Bits */ /* WUC_FSUB_1[CHANID] Bits */ #define WUC_FSUB_1_CHANID_OFS (0) /* !< CHANID Offset */ #define WUC_FSUB_1_CHANID_MASK ((uint32_t)0x000000FFU) /* !< 0 = disconnected. 1-15 = connected to channelID = CHANID. */ #define WUC_FSUB_1_CHANID_MNIMUM ((uint32_t)0x00000000U) /* !< 0 is an allowed value, signifying that the event is unconnected */ #define WUC_FSUB_1_CHANID_UNCONNECTED ((uint32_t)0x00000000U) /* !< A value of 0 specifies that the event is not connected */ #define WUC_FSUB_1_CHANID_MAXIMUM ((uint32_t)0x0000000FU) /* !< Consult your device datasheet as the actual allowed maximum may be less than15. */ #ifdef __cplusplus } #endif #endif /* ti_devices_msp_peripherals_hw_wuc__include */