SkyLi
241 lines
8.8 KiB
C
241 lines
8.8 KiB
C
/*
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* Copyright (c) 2023, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdint.h>
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#include <ti/devices/DeviceFamily.h>
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#if (DeviceFamily_PARENT == DeviceFamily_PARENT_MSPM0H321X)
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#include <ti/driverlib/m0p/sysctl/dl_sysctl_mspm0h321x.h>
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void DL_SYSCTL_setLFCLKSourceLFXT(const DL_SYSCTL_LFCLKConfig *config)
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{
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DL_Common_updateReg(&SYSCTL->SOCLOCK.LFCLKCFG,
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((uint32_t) config->lowCap << SYSCTL_LFCLKCFG_LOWCAP_OFS) |
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(uint32_t) config->xt1Drive,
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(SYSCTL_LFCLKCFG_XT1DRIVE_MASK | SYSCTL_LFCLKCFG_LOWCAP_MASK));
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// start the LFXT oscillator
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SYSCTL->SOCLOCK.LFXTCTL =
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(SYSCTL_LFXTCTL_KEY_VALUE | SYSCTL_LFXTCTL_STARTLFXT_TRUE);
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// wait until LFXT oscillator is stable
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// if it does not stabilize, check the hardware/IOMUX settings
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while ((DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_LFXTGOOD_MASK) !=
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DL_SYSCTL_CLK_STATUS_LFXT_GOOD) {
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;
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}
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if (config->monitor) {
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// set the LFCLK monitor
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SYSCTL->SOCLOCK.LFCLKCFG |= SYSCTL_LFCLKCFG_MONITOR_ENABLE;
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}
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// switch LFCLK source from LFOSC to LFXT
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SYSCTL->SOCLOCK.LFXTCTL =
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(SYSCTL_LFXTCTL_KEY_VALUE | SYSCTL_LFXTCTL_SETUSELFXT_TRUE);
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}
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void DL_SYSCTL_switchMCLKfromSYSOSCtoLFCLK(bool disableSYSOSC)
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{
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// Set SYSOSC back to base frequency if left enabled
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if (disableSYSOSC == false) {
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DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
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// Do not set both bits
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SYSCTL->SOCLOCK.SYSOSCCFG &= ~SYSCTL_SYSOSCCFG_DISABLE_ENABLE;
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SYSCTL->SOCLOCK.MCLKCFG |= SYSCTL_MCLKCFG_USELFCLK_ENABLE;
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} else {
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// Do not set both bits
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SYSCTL->SOCLOCK.MCLKCFG &= ~SYSCTL_MCLKCFG_USELFCLK_ENABLE;
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SYSCTL->SOCLOCK.SYSOSCCFG |= SYSCTL_SYSOSCCFG_DISABLE_ENABLE;
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}
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// Verify LFCLK -> MCLK
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while ((DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_CURMCLKSEL_MASK) !=
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DL_SYSCTL_CLK_STATUS_MCLK_SOURCE_LFCLK) {
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;
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}
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}
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void DL_SYSCTL_switchMCLKfromLFCLKtoSYSOSC(void)
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{
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// Only one should have been set, but clear both because unknown incoming state
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// Clear SYSOSCCFG.DISABLE to get SYSOSC running again
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// Clear MCLKCFG.USELFCLK to switch MCLK source from LFCLK to SYSOSC
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SYSCTL->SOCLOCK.SYSOSCCFG &= ~SYSCTL_SYSOSCCFG_DISABLE_ENABLE;
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SYSCTL->SOCLOCK.MCLKCFG &= ~SYSCTL_MCLKCFG_USELFCLK_ENABLE;
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// Verify SYSOSC -> MCLK
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while ((DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_CURMCLKSEL_MASK) ==
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DL_SYSCTL_CLK_STATUS_MCLK_SOURCE_LFCLK) {
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;
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}
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}
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void DL_SYSCTL_switchMCLKfromSYSOSCtoHSCLK(DL_SYSCTL_HSCLK_SOURCE source)
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{
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// Assume desired HS sources already enabled per their requirements (SYSPLL, HFXT, HFCLK_IN)
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// Selected desired HSCLK source
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DL_SYSCTL_setHSCLKSource(source);
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// Verify HSCLK source is valid
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while ((DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_HSCLKGOOD_MASK) !=
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DL_SYSCTL_CLK_STATUS_HSCLK_GOOD) {
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;
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}
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// Switch MCLK to HSCLK
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SYSCTL->SOCLOCK.MCLKCFG |= SYSCTL_MCLKCFG_USEHSCLK_ENABLE;
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// Verify HSCLK -> MCLK
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while ((DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_HSCLKMUX_MASK) !=
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DL_SYSCTL_CLK_STATUS_MCLK_SOURCE_HSCLK) {
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;
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}
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}
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void DL_SYSCTL_switchMCLKfromHSCLKtoSYSOSC(void)
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{
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// Switch MCLK to SYSOSC
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SYSCTL->SOCLOCK.MCLKCFG &= ~SYSCTL_MCLKCFG_USEHSCLK_ENABLE;
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// Verify SYSOSC -> MCLK
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while ((DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_HSCLKMUX_MASK) ==
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DL_SYSCTL_CLK_STATUS_MCLK_SOURCE_HSCLK) {
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;
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}
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}
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void DL_SYSCTL_setHFCLKSourceHFXT(DL_SYSCTL_HFXT_RANGE range)
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{
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DL_SYSCTL_setHFXTFrequencyRange(range);
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/* Set startup time to ~0.512ms based on TYP datasheet recommendation */
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DL_SYSCTL_setHFXTStartupTime(8);
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SYSCTL->SOCLOCK.HSCLKEN |= SYSCTL_HSCLKEN_HFXTEN_ENABLE;
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DL_SYSCTL_enableHFCLKStartupMonitor();
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/* Wait until HFXT oscillator is stable. If it does not stabilize, check the
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hardware/IOMUX settings */
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while ((DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_HFCLKGOOD_MASK) !=
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DL_SYSCTL_CLK_STATUS_HFCLK_GOOD) {
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;
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}
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}
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void DL_SYSCTL_setHFCLKSourceHFXTParams(
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DL_SYSCTL_HFXT_RANGE range, uint32_t startupTime, bool monitorEnable)
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{
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DL_SYSCTL_setHFXTFrequencyRange(range);
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DL_SYSCTL_setHFXTStartupTime(startupTime);
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SYSCTL->SOCLOCK.HSCLKEN |= SYSCTL_HSCLKEN_HFXTEN_ENABLE;
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if (monitorEnable == true) {
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DL_SYSCTL_enableHFCLKStartupMonitor();
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/* Wait until HFXT oscillator is stable. If it does not stabilize, check the
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hardware/IOMUX settings */
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while (
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(DL_SYSCTL_getClockStatus() & SYSCTL_CLKSTATUS_HFCLKGOOD_MASK) !=
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DL_SYSCTL_CLK_STATUS_HFCLK_GOOD) {
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;
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}
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} else {
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DL_SYSCTL_disableHFCLKStartupMonitor();
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}
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}
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DL_SYSCTL_POWER_POLICY_RUN_SLEEP DL_SYSCTL_getPowerPolicyRUNSLEEP(void)
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{
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DL_SYSCTL_POWER_POLICY_RUN_SLEEP policy =
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DL_SYSCTL_POWER_POLICY_RUN_SLEEP_NOT_ENABLED;
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// Check if SLEEP is enabled
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if ((SCB->SCR & SCB_SCR_SLEEPDEEP_Msk) != SCB_SCR_SLEEPDEEP_Msk) {
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// Check which policy is enabled
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if ((SYSCTL->SOCLOCK.MCLKCFG & SYSCTL_MCLKCFG_USELFCLK_MASK) ==
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SYSCTL_MCLKCFG_USELFCLK_ENABLE) {
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policy = DL_SYSCTL_POWER_POLICY_RUN_SLEEP1;
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} else if ((SYSCTL->SOCLOCK.SYSOSCCFG &
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SYSCTL_SYSOSCCFG_DISABLESTOP_MASK) ==
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SYSCTL_SYSOSCCFG_DISABLESTOP_ENABLE) {
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policy = DL_SYSCTL_POWER_POLICY_RUN_SLEEP2;
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} else {
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policy = DL_SYSCTL_POWER_POLICY_RUN_SLEEP0;
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}
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}
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return policy;
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}
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DL_SYSCTL_POWER_POLICY_STOP DL_SYSCTL_getPowerPolicySTOP(void)
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{
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DL_SYSCTL_POWER_POLICY_STOP policy =
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DL_SYSCTL_POWER_POLICY_STOP_NOT_ENABLED;
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// Check if STOP is enabled
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if ((SYSCTL->SOCLOCK.PMODECFG == SYSCTL_PMODECFG_DSLEEP_STOP) &&
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(SCB->SCR & SCB_SCR_SLEEPDEEP_Msk) == SCB_SCR_SLEEPDEEP_Msk) {
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// Check which policy is enabled
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if ((SYSCTL->SOCLOCK.SYSOSCCFG & SYSCTL_SYSOSCCFG_DISABLESTOP_MASK) ==
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SYSCTL_SYSOSCCFG_DISABLESTOP_ENABLE) {
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policy = DL_SYSCTL_POWER_POLICY_STOP2;
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} else {
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policy = DL_SYSCTL_POWER_POLICY_STOP0;
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}
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}
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return policy;
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}
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DL_SYSCTL_POWER_POLICY_STANDBY DL_SYSCTL_getPowerPolicySTANDBY(void)
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{
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DL_SYSCTL_POWER_POLICY_STANDBY policy =
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DL_SYSCTL_POWER_POLICY_STANDBY_NOT_ENABLED;
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// Check if STOP is enabled
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if ((SYSCTL->SOCLOCK.PMODECFG == SYSCTL_PMODECFG_DSLEEP_STANDBY) &&
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(SCB->SCR & SCB_SCR_SLEEPDEEP_Msk) == SCB_SCR_SLEEPDEEP_Msk) {
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// Check which policy is enabled
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if ((SYSCTL->SOCLOCK.MCLKCFG & SYSCTL_MCLKCFG_STOPCLKSTBY_MASK) ==
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SYSCTL_MCLKCFG_STOPCLKSTBY_ENABLE) {
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policy = DL_SYSCTL_POWER_POLICY_STANDBY1;
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} else {
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policy = DL_SYSCTL_POWER_POLICY_STANDBY0;
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}
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}
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return policy;
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}
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void DL_SYSCTL_configFCC(DL_SYSCTL_FCC_TRIG_TYPE trigLvl,
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DL_SYSCTL_FCC_TRIG_SOURCE trigSrc, DL_SYSCTL_FCC_CLOCK_SOURCE clkSrc)
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{
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DL_Common_updateReg(&SYSCTL->SOCLOCK.GENCLKCFG,
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(uint32_t) trigLvl | (uint32_t) trigSrc | (uint32_t) clkSrc,
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SYSCTL_GENCLKCFG_FCCLVLTRIG_MASK | SYSCTL_GENCLKCFG_FCCTRIGSRC_MASK |
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SYSCTL_GENCLKCFG_FCCSELCLK_MASK);
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}
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#endif /* DeviceFamily_PARENT_MSPM0H321X */
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