SkyLi
216 lines
7.0 KiB
C
216 lines
7.0 KiB
C
/*
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* Copyright (c) 2023, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* ============ ti_msp_dl_config.c =============
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* Configured MSPM0 DriverLib module definitions
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*
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* DO NOT EDIT - This file is generated for the MSPM0G350X
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* by the SysConfig tool.
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*/
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#include "ti_msp_dl_config.h"
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DL_TimerG_backupConfig gQEI_0Backup;
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/*
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* ======== SYSCFG_DL_init ========
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* Perform any initialization needed before using any board APIs
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*/
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SYSCONFIG_WEAK void SYSCFG_DL_init(void)
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{
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SYSCFG_DL_initPower();
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SYSCFG_DL_GPIO_init();
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/* Module-Specific Initializations*/
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SYSCFG_DL_SYSCTL_init();
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SYSCFG_DL_QEI_0_init();
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SYSCFG_DL_VREF_init();
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SYSCFG_DL_SYSTICK_init();
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/* Ensure backup structures have no valid state */
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gQEI_0Backup.backupRdy = false;
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}
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/*
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* User should take care to save and restore register configuration in application.
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* See Retention Configuration section for more details.
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*/
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SYSCONFIG_WEAK bool SYSCFG_DL_saveConfiguration(void)
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{
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bool retStatus = true;
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retStatus &= DL_TimerG_saveConfiguration(QEI_0_INST, &gQEI_0Backup);
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return retStatus;
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}
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SYSCONFIG_WEAK bool SYSCFG_DL_restoreConfiguration(void)
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{
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bool retStatus = true;
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retStatus &= DL_TimerG_restoreConfiguration(QEI_0_INST, &gQEI_0Backup, false);
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return retStatus;
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}
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SYSCONFIG_WEAK void SYSCFG_DL_initPower(void)
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{
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DL_GPIO_reset(GPIOA);
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DL_GPIO_reset(GPIOB);
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DL_TimerG_reset(QEI_0_INST);
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DL_VREF_reset(VREF);
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DL_GPIO_enablePower(GPIOA);
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DL_GPIO_enablePower(GPIOB);
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DL_TimerG_enablePower(QEI_0_INST);
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DL_VREF_enablePower(VREF);
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delay_cycles(POWER_STARTUP_DELAY);
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}
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SYSCONFIG_WEAK void SYSCFG_DL_GPIO_init(void)
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{
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DL_GPIO_initPeripheralAnalogFunction(GPIO_HFXIN_IOMUX);
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DL_GPIO_initPeripheralAnalogFunction(GPIO_HFXOUT_IOMUX);
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DL_GPIO_initPeripheralAnalogFunction(GPIO_LFXIN_IOMUX);
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DL_GPIO_initPeripheralAnalogFunction(GPIO_LFXOUT_IOMUX);
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DL_GPIO_initPeripheralInputFunction(GPIO_QEI_0_PHA_IOMUX,GPIO_QEI_0_PHA_IOMUX_FUNC);
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DL_GPIO_initPeripheralInputFunction(GPIO_QEI_0_PHB_IOMUX,GPIO_QEI_0_PHB_IOMUX_FUNC);
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DL_GPIO_initDigitalOutputFeatures(LED_A14_PIN_14_IOMUX,
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DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_DOWN,
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DL_GPIO_DRIVE_STRENGTH_LOW, DL_GPIO_HIZ_DISABLE);
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DL_GPIO_initDigitalInputFeatures(KEY_BSL_PIN_18_IOMUX,
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DL_GPIO_INVERSION_DISABLE, DL_GPIO_RESISTOR_PULL_DOWN,
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DL_GPIO_HYSTERESIS_DISABLE, DL_GPIO_WAKEUP_DISABLE);
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DL_GPIO_clearPins(GPIOA, LED_A14_PIN_14_PIN);
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DL_GPIO_enableOutput(GPIOA, LED_A14_PIN_14_PIN);
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DL_GPIO_setUpperPinsPolarity(GPIOA, DL_GPIO_PIN_18_EDGE_RISE);
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DL_GPIO_clearInterruptStatus(GPIOA, KEY_BSL_PIN_18_PIN);
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DL_GPIO_enableInterrupt(GPIOA, KEY_BSL_PIN_18_PIN);
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}
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static const DL_SYSCTL_SYSPLLConfig gSYSPLLConfig = {
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.inputFreq = DL_SYSCTL_SYSPLL_INPUT_FREQ_32_48_MHZ,
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.rDivClk2x = 1,
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.rDivClk1 = 0,
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.rDivClk0 = 0,
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.enableCLK2x = DL_SYSCTL_SYSPLL_CLK2X_DISABLE,
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.enableCLK1 = DL_SYSCTL_SYSPLL_CLK1_DISABLE,
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.enableCLK0 = DL_SYSCTL_SYSPLL_CLK0_ENABLE,
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.sysPLLMCLK = DL_SYSCTL_SYSPLL_MCLK_CLK0,
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.sysPLLRef = DL_SYSCTL_SYSPLL_REF_HFCLK,
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.qDiv = 3,
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.pDiv = DL_SYSCTL_SYSPLL_PDIV_1
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};
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static const DL_SYSCTL_LFCLKConfig gLFCLKConfig = {
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.lowCap = false,
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.monitor = false,
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.xt1Drive = DL_SYSCTL_LFXT_DRIVE_STRENGTH_HIGHEST,
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};
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SYSCONFIG_WEAK void SYSCFG_DL_SYSCTL_init(void)
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{
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//Low Power Mode is configured to be SLEEP0
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DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
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DL_SYSCTL_setFlashWaitState(DL_SYSCTL_FLASH_WAIT_STATE_2);
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DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
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/* Set default configuration */
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DL_SYSCTL_disableHFXT();
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DL_SYSCTL_disableSYSPLL();
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DL_SYSCTL_setHFCLKSourceHFXTParams(DL_SYSCTL_HFXT_RANGE_32_48_MHZ,0, false);
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DL_SYSCTL_configSYSPLL((DL_SYSCTL_SYSPLLConfig *) &gSYSPLLConfig);
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DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_2);
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DL_SYSCTL_setHFCLKDividerForMFPCLK(DL_SYSCTL_HFCLK_MFPCLK_DIVIDER_10);
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DL_SYSCTL_setLFCLKSourceLFXT((DL_SYSCTL_LFCLKConfig *) &gLFCLKConfig);
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DL_SYSCTL_enableMFCLK();
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DL_SYSCTL_enableMFPCLK();
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DL_SYSCTL_setMFPCLKSource(DL_SYSCTL_MFPCLK_SOURCE_SYSOSC);
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DL_SYSCTL_setMCLKSource(SYSOSC, HSCLK, DL_SYSCTL_HSCLK_SOURCE_SYSPLL);
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}
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static const DL_TimerG_ClockConfig gQEI_0ClockConfig = {
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.clockSel = DL_TIMER_CLOCK_BUSCLK,
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.divideRatio = DL_TIMER_CLOCK_DIVIDE_1,
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.prescale = 0U
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};
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SYSCONFIG_WEAK void SYSCFG_DL_QEI_0_init(void) {
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DL_TimerG_setClockConfig(
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QEI_0_INST, (DL_TimerG_ClockConfig *) &gQEI_0ClockConfig);
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DL_TimerG_configQEI(QEI_0_INST, DL_TIMER_QEI_MODE_2_INPUT,
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DL_TIMER_CC_INPUT_INV_NOINVERT, DL_TIMER_CC_0_INDEX);
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DL_TimerG_configQEI(QEI_0_INST, DL_TIMER_QEI_MODE_2_INPUT,
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DL_TIMER_CC_INPUT_INV_NOINVERT, DL_TIMER_CC_1_INDEX);
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DL_TimerG_setLoadValue(QEI_0_INST, 65535);
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DL_TimerG_enableClock(QEI_0_INST);
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}
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static const DL_VREF_Config gVREFConfig = {
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.vrefEnable = DL_VREF_ENABLE_DISABLE,
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.bufConfig = DL_VREF_BUFCONFIG_OUTPUT_2_5V,
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.shModeEnable = DL_VREF_SHMODE_DISABLE,
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.holdCycleCount = DL_VREF_HOLD_MIN,
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.shCycleCount = DL_VREF_SH_MIN,
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};
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SYSCONFIG_WEAK void SYSCFG_DL_VREF_init(void) {
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DL_VREF_configReference(VREF,
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(DL_VREF_Config *) &gVREFConfig);
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}
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SYSCONFIG_WEAK void SYSCFG_DL_SYSTICK_init(void)
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{
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/* Initialize the period to 1.00 μs */
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DL_SYSTICK_init(80);
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/* Enable the SysTick and start counting */
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DL_SYSTICK_enable();
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}
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